With the rapid development of semiconductor manufacturing technology, the semiconductor devices are desirable to have high component density, and high degree of integration. Transistors, as the basic semiconductor devices, have been widely used. When the component density and the integration degree of the semiconductor devices are increasing, the gate size of transistors is getting smaller. However, a short size of the transistor gates may introduce a short channel effect, and thus may produce leakage current, and ultimately may affect the electrical properties of the semiconductor devices.
In order to overcome the short channel effect and to suppress the leakage current, a multi-gate device, fin field effect transistor (Fin FET), has been developed. A structure of the fin field effect transistor can include: a semiconductor substrate, a fin part, a dielectric layer, a gate structure, a source region and a drain region. The fin structure and the dielectric layer are on a surface of the semiconductor substrate. The dielectric layer covers a part of sidewall of the fin part. A top surface of the dielectric layer is below the top of the fin part. The gate structure is located on the surface of the dielectric layer, the top and the sidewall of the fin part. The source region and the drain region are located in the fin part on both sides of the gate structure.
However, the future development of semiconductor manufacturing technology requires a significant improvement of the performance of the fin field effect transistor.